Program Highlight
Keynote
Test Data Analytics - from Mathematical Tools to Applications
Kwang-Ting (Tim) Cheng, University of California, Santa Barbara
Invited Speeches
New Approaches to Improving Quality and Accelerating Yield Ramp to
Meet Process Technology Disruptions
Wu-Tung Cheng, Chief Scientist and Test Research Director, Mentor Graphics
3DIC's System Design Impact and Testing Needs
William Wu Shen, Test Chip Design Verification Division, TSMC
Oral Presentations
Seventeen technical and two industry sessions that cover nearly all
aspects of key area in VLSI testing, from 3D-IC to ATPG.
Full-Day and Embedded* Tutorials
Statistical Adaptive Tet Methods Targeting "Zero Defect" IC Quality
and Reliability
Adit D. Singh, Auburn University
Testing TSV-Based 3D Stacked ICs
Krishnendu Chakrabarty, Duke University
Data Mining in Test - Principles and Practices*
Li-C Wang, University of California, Santa Barbara
Software Testing*
Farn Wang, National Taiwan University
Vendor Session on New Test Technologies & Roadmap
| Mentor Graphics | DfT Technologies for High-Quality Cost-Effective Test of SoCs |
| Cadence | Flexible Test Methodologies for Large SoCs |
| Synopsys | New Solutions for Reducing the Time, Effort, and Cost of Quality SoC Testing |